NDLI: Efficient rendering and cache replacement mechanisms for hierarchical tiling in mobile GPUs

Content Provider	IEEE Xplore Digital Library
Author	Chih-Chieh Hsiao Slo-Li Chu Shang-Shun Dai
Copyright Year	2012
Description	Author affiliation: Department of Information and Computer Engineering Chung Yuan Christian University Chung Li, Taiwan (Chih-Chieh Hsiao; Slo-Li Chu; Shang-Shun Dai)
Abstract	The 3D rendering capabilities are now widely available in the consumer electronics devices because the consumer applications usually use it for superior user experience. However, those rendering capabilities have been very limited because the resources of these devices are limited; small amounts of memory, less bandwidth, and limited energy consumption. Therefore, the tile-based rendering becomes prevalent in mobile GPUs for consumer electronic devices. In the tiled systems, a hierarchical tiling technique is used to further reduce bandwidth requirement. However, the hierarchical tiling has very high locality when multi-core GPUs are adopted which is not well exploited. Therefore, this paper proposes a block-based rendering sequence and a multi-core locality-aware cache replacement (MLCR) mechanism to utilize this locality. The results show the proposed mechanism reduces cache miss rates from 46.78% to 38.06% when block-based rendering sequence is used with conventional cache replacement. The miss rate can be further reduced to 35.98% when incorporate proposed sequence with MLCR. Furthermore, the implementation cost is analyzed and shows the proposed mechanism is affordable in a consumer electronics device and improves performance of consumer applications with 3D graphics.
Starting Page	170
Ending Page	175
File Size	218541
Page Count	6
File Format	PDF
ISBN	9781467350860
e-ISBN	9781467350853
DOI	10.1109/GHTCE.2012.6490150
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2012-11-18
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Mobile GPU Rendering management Locality-aware Cache replacement
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in