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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Das, S. Bhaumik, J. |
| Copyright Year | 2012 |
| Description | Author affiliation: Dept of Electronics and Communication Engg, Haldia Institute of Technology, WB, India (Bhaumik, J.) || CRRAO AIMSCS, Hyderabad, AP, India (Das, S.) |
| Abstract | In this paper a Substitution Permutation Network( SPN) type, symmetric-key block cipher architecture has been proposed to strengthen it against fault attack. The proposed SPN type architechture employes two different types of diffusion layers. Each odd round contains eight parallel 16 bits diffusion layer and each even round contains two parallel 64 bits diffusion layer. Our architecture has been implemented in Spartan-3 FPGA xc3s5000 device and it provides a acceptable throughput of 866.538 Mbps. In this work, first time two different types of diffusion layer are used to strengthen SPN-type block cipher architecture against fault attack. |
| Starting Page | 560 |
| Ending Page | 563 |
| File Size | 152627 |
| Page Count | 4 |
| File Format | |
| ISBN | 9781467346993 |
| e-ISBN | 9781467347006 |
| DOI | 10.1109/CODIS.2012.6422264 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2012-12-28 |
| Publisher Place | India |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Resistance Algorithm design and analysis Ciphers Computer architecture Matrices Field programmable gate arrays Equations |
| Content Type | Text |
| Resource Type | Article |
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