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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Karaagac, F. Koc, H. Ozturk, S. |
| Copyright Year | 2013 |
| Description | Author affiliation: Sch. of Sci. & Comput. Eng., Univ. of Houston - Clear Lake, Houston, TX, USA (Karaagac, F.; Koc, H.; Ozturk, S.) |
| Abstract | In this paper, we present an educational Electronic Design Automation (EDA) tool to help undergraduate and graduate students better understand and implement fundamental concepts in digital electronic design and synthesis courses. The tool receives an intermediate format that represents the system behavior and a set of constraints as input; and generates the actual circuit in a net-list representation using the electronic components (functional units, memory and steering logic components) available in its library. A user is able to interact with the tool during the synthesis process and modify the intermediate representations before further execution. The effectiveness of the tool has been tested in a graduate level course. |
| Starting Page | 165 |
| Ending Page | 170 |
| File Size | 609172 |
| Page Count | 6 |
| File Format | |
| e-ISBN | 9781467350945 |
| DOI | 10.1109/ICeLeTE.2013.6644367 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2013-09-23 |
| Publisher Place | Poland |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Design automation Digital systems Processor scheduling Electronic Design Automation Libraries Scheduling Registers Resource management High Level Synthesis Optimization Computer Aided Design |
| Content Type | Text |
| Resource Type | Article |
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