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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Goldman, R. Bartleson, K. Wood, T. Watson, A. Melikyan, V. Babayan, E. Hakhverdyan, T. |
| Copyright Year | 2014 |
| Description | Author affiliation: Synopsys Inc., Mountain View, CA, USA (Goldman, R.; Bartleson, K.; Wood, T.; Watson, A.) || Synopsys Armenia CJSC, Yerevan, Armenia (Melikyan, V.; Babayan, E.; Hakhverdyan, T.) |
| Abstract | Due to the rapid development times, device complexity, etc. of the semiconductor industry it is challenging for universities to teach modern Integrated Circuit (IC) design. In particular, universities lack access to the necessary semiconductor technology data required to implement educational projects, as this information is normally proprietary. Additionally, access to state-of-the-art designs is also usually not available in the university environment. This paper presents an IC design course developed with the $DesignWare^{®}$ $ARC^{®}$ 600 Academic [1] processor core and the Synopsys 32/28nm Educational Design Kit (EDK) [2] available to universities through the Synopsys University Program. The course provides students with theoretical knowledge and practical experience in designing real ICs. |
| Sponsorship | IEEE Educ. Soc. |
| Starting Page | 66 |
| Ending Page | 69 |
| File Size | 341277 |
| Page Count | 4 |
| File Format | |
| ISSN | 21615330 |
| e-ISBN | 9781479943807 |
| DOI | 10.1109/IEDEC.2014.6784682 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2014-03-03 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | ARC 600 core Synthesis Microprocessors Computer architecture Educational institutions DesignWare ARC Processors Libraries Verification EDK Standards Clocks |
| Content Type | Text |
| Resource Type | Article |
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