NDLI: Optimization of Leakage Current in SRAM Cell Using Shorted Gate DG FinFET

Content Provider	IEEE Xplore Digital Library
Author	Sikarwar, V. Khandelwal, S. Akashe, S.
Copyright Year	2013
Description	Author affiliation: VLSI, ITM Univ., Gwalior, India (Sikarwar, V.) \|\| EI, ITM Univ., Gwalior, India (Akashe, S.) \|\| ECED, ITM Univ., Gwalior, India (Khandelwal, S.)
Abstract	Scaling of conventional CMOS circuit tends to have short channel effects due to which, effect such as drain induced barrier lowering, hot electron effect, punch through etc takes place and hence leakage increases in the transistor. To minimize short channel effects, double gate FinFET is used. FinFET may be the most promising device in the LSI (large scale integration) circuits because it realizes the self-aligned double-gate structure easily. In this paper, six transistors SRAM cell is designed using the tied gate DG FinFET. Sub-threshold leakage current and gate leakage current of internal transistors are observed and compared with the conventional structure of 6T SRAM cell. DG FinFET SRAM cell is applied with self controllable voltage level technique and then leakage current is observed. Simulation is performed with cadence virtuoso tool in 45 nm technology. The total leakage of DG FinFET SRAM cell is reduced by 34% after applying self controllable voltage level technique.
Starting Page	166
Ending Page	170
File Size	267136
Page Count	5
File Format	PDF
ISBN	9781467359658
ISSN	23270659
e-ISBN	9780769549415
DOI	10.1109/ACCT.2013.41
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-04-06
Publisher Place	India
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	CMOS Tied gate DG FinFET Logic gates FinFETs SRAM cells Leakage current CMOS integrated circuits SRAM cell Leakage currents
Content Type	Text
Resource Type	Article

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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