NDLI: Design of Low Voltage Low Power Operational Amplifier

Content Provider	IEEE Xplore Digital Library
Author	Sandhu, M. Bala, M.
Copyright Year	2012
Abstract	With the demand of low power applications, running circuits with reduced supply voltage can be of great advantage. Integrated circuit designers start to face a power wall as the most difficult constraints in new technology and circuit development are not triggered by process scaling factors, but by barriers imposed by packaging and cooling. The demand of circuits with reduced power consumption and the very fast growing market of portable electronic equipment are increasing the interest in very low power integrated circuits. Yet, designing very low power integrated circuits requires the reduction of the internal power supply voltages and interconnection parasitic to a minimum, as these are the most important parameters associated to power dissipation. In order to maintain the required performance, lowering the supply voltages implies decreasing transistor's threshold voltages, which brings about a series of problems both in technology and circuit design. The margin for error becomes so small, that any uncertainty in device or circuit parameters may dramatically degrade the performance of actual fabricated chips. As circuit design relies crucially on simulations, the only possibility to overcome these problems is to use highly precise tools to simulate both the fabrication process and the circuit behavior. Realizing that the conventional circuit design tools can not be used much longer to accurately predict circuit behavior an integrated simulation environment where all efforts to achieve maximum accuracy are taken into account. It links together ECAD tools with the accurate simulators found in TCAD frameworks. Active devices are characterized with device simulators and a table-based circuit simulator is used to avoid errors introduced by the fitting parameters procedures in compact models. Three-dimensional capacitance and resistance extractor simulators quantify the parasitic parameters in interconnection wires created by three-dimensional topography simulators. This way, it is possible to globally optimize circuit and technology parameters, and to obtain the best solution for a given application. In this work a technology suited for 0.5 V power supply is developed, and several very low power digital and analog circuits are given as examples, including a novel operational amplifier capable of operation down to half a volt.
Starting Page	368
Ending Page	373
File Size	2677627
Page Count	6
File Format	PDF
ISBN	9781467304719
DOI	10.1109/ACCT.2012.46
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2012-01-07
Publisher Place	India
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Low voltage CMOS Power supplies Analog circuits CMOS technology Threshold voltage CMOS integrated circuits Transistors LVLP Op Amp
Content Type	Text
Resource Type	Article

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