NDLI: Evaluation of power supply noise reduction by implementing on-chip capacitance

Content Provider	IEEE Xplore Digital Library
Author	Fujii, H. Kobayashi, Y. Sudo, T.
Copyright Year	2011
Description	Author affiliation: Shibaura Institute of Technology 3-7-5, Toyosu, Koto-ku, Tokyo, Japan (Fujii, H.; Kobayashi, Y.; Sudo, T.)
Abstract	On-chip decoupling capacitor works to reduce on-chip power supply fluctuation by localizing switching current inside chip. This results in the reduction of electromagnetic interference (EMI) by preventing switching current with high frequency components flowing out from the chip. In this paper, a test chip with on-chip decoupling capacitance and noise generating circuits has been reported using CMOS 0.18 μm process. Shoot-through current generator was designed to excite impulse type noise generation. Effects of on-chip capacitance on noise reduction ware evaluated by measuring the test chip as well as by using power supply noise analysis tool. Power supply noise reduction has been quantitatively evaluated by both experiment and analysis.
Starting Page	219
Ending Page	223
File Size	1081744
Page Count	5
File Format	PDF
ISBN	9781457708626
e-ISBN	9789531841580
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-11-06
Publisher Place	Croatia
Access Restriction	Subscribed
Rights Holder	Univ of Zagreb
Subject Keyword	Power supply noise On-chip capacitance Fluctuations Power supplies Noise Switches Capacitance Shoot-through current generator Noise generators CMOS test chips System-on-a-chip
Content Type	Text
Resource Type	Article

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