NDLI: CPB-ARM -- A New Code Compression Method for Embedded Systems

Content Provider	IEEE Xplore Digital Library
Author	Dias, W.R.A. Moreno, E.D.
Copyright Year	2012
Abstract	In the design of embedded systems, memory is one of the most restricted resources. The code compression has been proposed as a solution to reduce the code size of applications that run on embedded systems. However, one major challenge is to develop an efficient compression technique that generates a substantial reduction in code size without affecting the overall system performance. We have observed that most previous work compresses only instruction individually. Therefore, this paper proposes a new code compression method (CPB-ARM) which comprises four different types of compression techniques, and each of these techniques form different patterns of blocks taking into account the class and the format of each instruction. The simulation results showed that our method, which uses only 18 instructions, the most frequently used by the application, obtained a compression ratio of approximately 24% for twenty MiBench applications.
Starting Page	25
Ending Page	32
File Size	636153
Page Count	8
File Format	PDF
ISBN	9781467344685
DOI	10.1109/WSCAD-SSC.2012.20
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2012-10-17
Publisher Place	Brazil
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Code compression Embedded systems Reduced instruction set computing Embedded processor Benchmark testing Data processing Hardware Indexes ARM Patterns blocks
Content Type	Text
Resource Type	Article

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