NDLI: Front matter

Please wait, while we are loading the content...

2010 First IEEE Latin American Symposium on Circuits and Systems (LASCAS)

Digital control system using a thermoelectric cell for temperature electronic devices testing

A fuzzy control for optimizing the design of passive electrical circuits

On restoring data coherence in a GALS system for medical imaging

Image interpolation using cosine-sine modulated filter bank

Hardware/software implementation of an on-line machine learning algorithm

Design of a 12.5 GS/s 5-bit folding A/D converter

A Clock-less 8-bit folding A/D converter

An area-efficient coarse-fine resistor-string D/A converter

An architecture for first-order tunable mismatch shaping in oversampled data converters

Design methodology for ZCT and ZCZVT inverters

An energy based LQR tuning approach applied for Uninterruptible Power Supplies

A hardware DC motor emulator

A lightweight mechanism for dynamic linking in wireless sensor networks

A 128 FFT core implementation for multiband full-rate ultra-wideband receivers

A novel notch filter LNA for use in multi-band, multi-standard cellular receivers

A fully integrated 65 nm CMOS cascode HSFDS PA dedicated to 802.11n application

Characterization methodology of a millimeter-wave 65nm CMOS PA dedicated to 60GHz WPAN standard

Piecewise linear-based hybrid simulation of MOS and Single-Electron circuits

Optimized large size signed multipliers and applications in FPGAs

A parallel architecture for Ray-Tracing

Implementing and testing the FPGA prototype of a DCM demodulator using the Matlab/Simulink environment

Accurate multi-bit feedback DAC dedicated to high-speed Continuous-time ΔΣ converters

A Short-channel silicon-based Split-Drain MAGFET measuring from 90 µT

How can electrosurgical sparks generate undesirable effects?

A carbon nanotube spiking cortical neuron with tunable refractory period and spiking duration

Selectable gain amplifier for inductive sensor used to measure human motion

Motion vector predictor architecture for H.264/AVC Main profile targeting HDTV 1080p

A MIPS-based ASIP to accelerate the inverse Hadamard tranform for H.264/AVC video coding

Comparative analysis of parallel SAD calculation hardware architectures for H.264/AVC video coding

Analysis of the conditions for worst case switching activity in integrated circuits

Development of a signal acquisition platform for respiratory assistance

Impact of parasitic capacitances on the performance of SAR ADCs based on capacitive arrays

A CMOS QFG ECG amplifier with baseline stabilization

Design of a versatile voltage based output stage for implantable neural stimulators

Cache alternatives concerning cache coherence in NoC-based MPSoC platform

Grayscale CNN computation of Boolean functions

A study on the propagation times of loaded CMOS inverters

Multi-threaded circuit simulation using OpenMP

A modified Izhikevich model for circuit implementation of spiking neural networks

Impact of compilation options on the criticality of registers in a microprocessor-based system

A new automated instrumentation for emulation-based fault injection

Performance evaluation of hybrid ANN based time series prediction on embedded processor

Stepped triangular CIC decimation filter for SDR applications

On the normalized minimum error-entropy adaptive algorithm: Cost function and update recursion

Cross-layer constrained power management: Application to a multimedia mobile platform

Delay sensing for parametric variations and defects monitoring in safety-critical applications

Traffic modeling and analysis of PLC networks using Markov chains

Design of a high-sensitivity sub-40µg capacitive accelerometer using a Multi-Project Wafer process

A simple approach for the design of operational transconductance amplifiers for low power signal processing

Offset-compensated comparator with full-input range in 150nm FDSOI CMOS-3D technology

A new readout circuit for infrared imaging sensors

Practical considerations for the design of fully differential OTAs with SC-CMFB

Central Library (ISO-9001:2015 Certified)
Indian Institute of Technology Kharagpur
Kharagpur, West Bengal, India | PIN - 721302

See location in the Map
03222 282435
Mail: support@ndl.gov.in

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in