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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Bhai, Shah Palash Manish Gaonkar, Dattatraya N. |
| Copyright Year | 2016 |
| Description | Author affiliation: Electrical and Electronics Engineering Department, National Institute of Technology, Karnataka, Surathkal, India (Bhai, Shah Palash Manish; Gaonkar, Dattatraya N.) |
| Abstract | In this paper, an Analog to Digital Converter (ADC) based on binary-search algorithm is proposed. Existing binary-search based ADC design requires 2N-1 comparators for an N-bit ADC while the proposed design requires only N comparators. This ADC uses a switching network made up of static logic gates and MOSFET switches for predicting the reference voltage for the comparators. The proof-of-concept 3-bit ADC only consists of a reference ladder, 3 comparators, 6 n-MOSFET switches and 6 logic gates. The proposed 3-bit prototype was simulated using TINA-TI simulation software. The functionality of the ADC was ensured by giving sine and ramp input to the ADC. Also, the settling time of the ADC for different input voltage ranges was found out by giving step input to the ADC. |
| Starting Page | 499 |
| Ending Page | 502 |
| File Size | 315769 |
| Page Count | 4 |
| File Format | |
| e-ISBN | 9781479917693 |
| DOI | 10.1109/CMI.2016.7413798 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2016-01-08 |
| Publisher Place | India |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | MOSFET Conferences Prototypes Comparators Switches Logic gates Analog to digital converter Decoding Reference switching network Voltage control |
| Content Type | Text |
| Resource Type | Article |
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