NDLI: Intricacies in digital CMOS implementation of a reconfigurable fuzzy logic traffic light controller

Content Provider	IEEE Xplore Digital Library
Author	Khalaji, A. Seyedtabaii, S.
Copyright Year	2013
Description	Author affiliation: Electr. Eng., Shahed Univ., Tehran, Iran (Khalaji, A.; Seyedtabaii, S.)
Abstract	In this paper, the procedure of CMOS design of a reconfigurable fuzzy traffic light control that may work in a severe condition is discussed. The chip receives the membership degree parameters and traffic density indexes. The membership degree is allowed to have variable numbers of reconfigurable trapezoid patterns. Import/export of data is carried out through a serial link. The chip is designed using Very High Speed Integrated Circuit (VHSIC) Hardware Description Language (VHDL) implementing an optimized fuzzy traffic controller developed in [1]. Based on the traffic density, the algorithm decides whether to terminate the current green phase or to extend it for some more time for better intersection traffic handling. Design is tested versus full software implementation of the algorithm. The result exhibits successful hardware implementation. Then, the layout of the chip based on minimum die area is also derived.
Starting Page	187
Ending Page	191
File Size	633077
Page Count	5
File Format	PDF
e-ISBN	9781467364904
DOI	10.1109/IKT.2013.6620062
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-05-28
Publisher Place	Iran
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Fuzzy logic Algorithm design and analysis VHDL Traffic light control Layout Hardware CMOS integrated circuits Indexes Fuzzy CMOS implementation Vehicles
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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