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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Zeng Zhao Naijie Gu Yangzhao Yang |
| Copyright Year | 2013 |
| Description | Author affiliation: Sch. of Comput. Sci. & Technol., Univ. of Sci. & Technol. of China, Hefei, China (Zeng Zhao; Naijie Gu; Yangzhao Yang) |
| Abstract | A typical decoupled access/execute architecture (DAE) processor is consisting of Access Processors (AP) and Execute Processors (EP). The overhead of memory access of AP can be hidden by calculation of EP. Based on this principle, a new optimization algorithm of general dense matrix multiplication operation (GEMM) will be introduced in this paper. The algorithm is divided into four levels, every level of which uses different storage structure of the processor. That makes the algorithm closely combine with the features of DAE architecture. Furthermore, a fetch performance evaluation system - DAEFS will also be introduced. It is a runtime system with very little overhead, and can be used to collect the information about the relationship between fetching and calculation for DAE processors. With the help of DAEFS, several levels of the new algorithm are capable to self-adjust. Consequently, the algorithm can find the best block parameters for several levels during runtime. We implement the algorithm with DAEFS on a DAE processor platform - Godson-3B, which has been used to build up the teraflop computer - KD90. The performance of the optimized GEMM on the real platform matches the best simulation results of this processor. |
| Starting Page | 233 |
| Ending Page | 239 |
| File Size | 433957 |
| Page Count | 7 |
| File Format | |
| e-ISBN | 9781479927968 |
| DOI | 10.1109/CANDAR.2013.41 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2013-12-04 |
| Publisher Place | Japan |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Algorithm design and analysis Prefetching Computer architecture Registers Kernel Niobium Optimization |
| Content Type | Text |
| Resource Type | Article |
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