NDLI: A hybrid strategy for mapping multiple throughput-constrained applications on MPSoCs

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A hybrid strategy for mapping multiple throughput-constrained applications on MPSoCs

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A hybrid strategy for mapping multiple throughput-constrained applications on MPSoCs

Content Provider	IEEE Xplore Digital Library
Author	Singh, A.K. Kumar, A. Srikanthan, T.
Copyright Year	2011
Description	Author affiliation: Nanyang Technological University, Singapore 639798 (Singh, A.K.; Srikanthan, T.) \|\| National University of Singapore, Singapore 117583 (Kumar, A.)
Abstract	Modern embedded systems are based on Multiprocessor-Systems-on-Chip (MPSoCs) to meet the strict timing deadlines of multiple applications. MPSoC resources must be utilized efficiently by mapping the applications in throughput-aware manner in order to meet throughput constraints for each of them. A design-time methodology is applicable only to predefined set of applications with static behavior, which is incapable of handling dynamism in applications. On the other hand, a run-time approach can cater to the dynamism but cannot provide timing guarantees for all the applications due to large computation requirements at run-time. This paper presents a hybrid flow which performs compute intensive analysis at design-time to derive multiple resource-throughput trade-off points and selects one of these at runtime subject to available resources and desired throughput. Experimental results show that the design-time analysis is faster by 39%, provides better trade-off points and the runtime mapping is speeded up by 93% when compared to state-of-the-art techniques.
Starting Page	175
Ending Page	184
File Size	688494
Page Count	10
File Format	PDF
e-ISBN	9781450307130
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-10-09
Publisher Place	Taiwan
Access Restriction	Subscribed
Rights Holder	Association for Computing Machinery, Inc. (ACM)
Subject Keyword	Multiprocessor Design-time analysis Databases Synchronous Dataflow Tiles Run-time mapping Bandwidth Throughput Timing Decoding Optimization
Content Type	Text
Resource Type	Article

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3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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