NDLI: A low-inductance packaging layout for 1.2kV, 40A Full-SiC power module embedding split damping capacitors

Content Provider	IEEE Xplore Digital Library
Author	Yu Ren Fan Zhang Long Liu Linlin Tan Xu Yang Xiangjun Zeng
Copyright Year	2015
Description	Author affiliation: Power Electron. & Renewable Energy Res. Center, Xi'an Jiaotong Univ., Xi'an, China (Yu Ren; Fan Zhang; Long Liu; Linlin Tan; Xu Yang; Xiangjun Zeng)
Abstract	A novel packaging layout of Full-SiC(Silicon Carbide) MOSFET (Metal Oxide Semiconductor Field Effect Transistor) Module with split damping capacitors embedding inside innovatively is proposed, which decrease stray inductance greatly. Since the stray inductance of the commutation loop caused by bonding wires and patterns on the substrate will result in a large voltage spike over the semiconductor device. The module with damping capacitors inside will decrease the stray inductance of the commutation loop significantly. The stray inductance extracted by commercial simulation software ANSYS Q3D Extractor electromagnetic FEA (Finite Element Analysis) tool show that a total self-inductance of the single commutation loop is 6.2nH. The LTspice simulation based on the synchronous buck circuit shows a 55V voltage spike over the semiconductor on the current rate 6717A/μs. In this paper, the current difference between two parallel branches is simulated by LTspice and a remarkable performance is observed. These results demonstrate the validity of the proposed packaging structure of a Full-SiC Module.
Starting Page	1
Ending Page	5
File Size	1019064
Page Count	5
File Format	PDF
ISBN	9781479976553
e-ISBN	9781479976577
DOI	10.1109/IFEEC.2015.7361520
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-11-01
Publisher Place	Taiwan
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Inductance MOSFET Silicon carbide Capacitors Layout Multichip modules Switches
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Ultra low inductance power module for fast switching SiC power devices

Packaging SiC power semiconductors — Challenges, technologies and strategies

10kV SiC MOSFET split output power module

The design and fabrication of a 50KVA 450A silicon carbide power electronic module

Advanced packaging of SiC power module for automotive applications

An optimized gate-loop layout for multi-chip SiC MOSFET power modules

Influences of Device and Circuit Mismatches on Paralleling Silicon Carbide MOSFETs

Static and dynamic performance assessment of commercial SiC MOSFET power modules

Development of SiC power devices and modules for automotive motor drive use

A low-inductance packaging layout for 1.2kV, 40A Full-SiC power module embedding split damping capacitors

Similar Documents

Ultra low inductance power module for fast switching SiC power devices

Packaging SiC power semiconductors — Challenges, technologies and strategies

10kV SiC MOSFET split output power module

The design and fabrication of a 50KVA 450A silicon carbide power electronic module

Advanced packaging of SiC power module for automotive applications

An optimized gate-loop layout for multi-chip SiC MOSFET power modules

Influences of Device and Circuit Mismatches on Paralleling Silicon Carbide MOSFETs

Static and dynamic performance assessment of commercial SiC MOSFET power modules

Development of SiC power devices and modules for automotive motor drive use

A low-inductance packaging layout for 1.2kV, 40A Full-SiC power module embedding split damping capacitors