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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Chien-Chang Huang Chia-Kai Chen |
| Copyright Year | 2013 |
| Description | Author affiliation: Dept. of Commun. Eng., Yuan Ze Univ., Chungli, Taiwan (Chien-Chang Huang; Chia-Kai Chen) |
| Abstract | This paper presents a CMOS on-chip transformer characterization for line driver applications of digital transmission using differential signals. The central-tap structure for the secondary coil is designed carefully to ensure the signal integrity after converting the signal into differential format, while the broadside-coupled configuration for the coils is utilized to enhance the transformer coupling coefficient. The final designed transformer is in 1:3 turn ratio with chip area of 265 μm × 265 μm using TSMC 0.18 μm on-poly-six-metal (1P6M) technology. The characterization is based on the differential-/common-mode thru-reflect-line calibration to acquire the actual four-port scattering parameter with extraction of the associated parameters including inductances, quality factor and coupling coefficient. The measured data are further used as a basis to simulate the high-speed digital transmission at 5 Gbps where good differential signal qualities are observed. |
| Starting Page | 1 |
| Ending Page | 4 |
| File Size | 1215494 |
| Page Count | 4 |
| File Format | |
| ISBN | 9781509018857 |
| DOI | 10.1109/APEMC.2013.7360631 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2013-05-20 |
| Publisher Place | Australia |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Couplings Thru-reflect-line calibration Line driver High-speed digital transmission On-chip transformer Transmission line measurements CMOS technology CMOS integrated circuits System-on-chip Scattering parameters Calibration Vehicles |
| Content Type | Text |
| Resource Type | Article |
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