NDLI: An Advanced Platform for Development and Evaluation of Grid Interconnection Systems Using Hardware-in-the-Loop: Part III -- Grid Interconnection System Evaluator

Content Provider	IEEE Xplore Digital Library
Author	Lundstrom, B. Shirazi, M. Coddington, M. Kroposki, B.
Copyright Year	2013
Description	Author affiliation: Nat. Renewable Energy Lab., Golden, CO, USA (Lundstrom, B.; Shirazi, M.; Coddington, M.; Kroposki, B.)
Abstract	The world's energy paradigm continues to undergo a rapid shift towards an increased use of renewable energy sources. To support this shift, an advanced electric power system architecture is being implemented by many electric utilities, interconnected with new distributed energy resources. As these new installations occur, it is essential to verify that their grid interconnection systems (ICS) conform to the relevant grid interconnection standards and that they perform satisfactorily under a variety of variable resource input and grid output conditions. This paper describes a Grid Interconnection System Evaluator (GISE) that leverages hardware-in-the-loop (HIL) simulation techniques to rapidly evaluate the grid interconnection standard conformance of an ICS according to the procedures in IEEE Std 1547.1TM. The architecture and test sequencing of this evaluation tool, along with a set of representative ICS test results from three different photovoltaic (PV) inverters, are presented. The GISE adds to the National Renewable Energy Laboratory's (NREL) evaluation platform that now allows for rapid development of ICS control algorithms using controller HIL (CHIL) techniques, the ability to test the dc input characteristics of PV-based ICSs through the use of a PV simulator capable of simulating real-world dynamics using power HIL (PHIL), and evaluation of the grid interconnection conformance of an ICS.
Sponsorship	IEEE Denver Sect.
Starting Page	392
Ending Page	399
File Size	2035278
Page Count	8
File Format	PDF
ISBN	9781467351911
ISSN	21665478
e-ISBN	9780769549668
DOI	10.1109/GreenTech.2013.67
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-04-04
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Interconnection standards Distributed energy resources Hardware-in-the-loop (HIL) IEEE Std 1547 Software Hardware Grid interconnection IEEE standards Mathematical model Voltage control Load modeling Testing
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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