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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Ghattas, R. Parsons, G. Dean, A.G. |
| Copyright Year | 2007 |
| Description | Author affiliation: Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC (Ghattas, R.; Parsons, G.; Dean, A.G.) |
| Abstract | Many real-time (RT) embedded systems can benefit from a memory hierarchy to bridge the processor/memory speed gap. These RT embedded systems usually utilize a cacheless architecture to avoid the time variability which complicates the timing analysis essential for RT systems. In the absence of a cache the burden of allocating the data objects to the memory hierarchy is on the programmer/compiler. There has been much research into allocating data objects into the memory hierarchy for efficient execution. However, existing methods have limited scope and ignore some aspects of RT multitasking embedded systems. In this paper we propose a synergistic, optimal approach to allocating data objects and scheduling real-time tasks for embedded systems. We allocate data using integer linear programming (ILP) to minimize each task's worst-case execution time (WCET), then perform preemption threshold scheduling (PTS) on the tasks to reduce stack memory requirements while still meeting hard RT deadlines. The memory reduction of PTS allows these steps to be repeated. The data objects now require less memory, so more can fit into faster memory, further reducing WCET. The increased slack time can be used by PTS to reduce preemptions further, until a fixed point is reached. We evaluate the technique with several levels of data object granularity using both synthetic workloads and a real-time benchmark and find it to be highly effective |
| Sponsorship | IEEE Comput. Soc. Tech. Comm. on Real-Time Syst |
| Starting Page | 168 |
| Ending Page | 182 |
| File Size | 306321 |
| Page Count | 15 |
| File Format | |
| ISBN | 0769528007 |
| ISSN | 10801812 |
| DOI | 10.1109/RTAS.2007.23 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2007-04-03 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Real time systems Bridges Program processors Processor scheduling Embedded system Random access memory Integer linear programming Hardware Timing Programming profession |
| Content Type | Text |
| Resource Type | Article |
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