NDLI: Statistical Performance Analysis and Estimation of Coarse Grain Parallel Multimedia Processing System

Content Provider	IEEE Xplore Digital Library
Author	Min Li Van Achteren, T. Brockmeyer, E. Catthoor, F.
Copyright Year	2006
Description	Author affiliation: IMEC (Min Li)
Abstract	When parallelizing complex multimedia processing on multiple processors, the stochastic timing behavior should be carefully studied. Although there are already many papers on the performance analysis of stochastic parallel system, they are not targeted on multimedia processing. In this paper, first we study H.264/AVC encoder (running on x86) and QSDPCM encoder (running on TI TMS32C62 instruction simulator) to characterize important aspects of the stochastic timing behavior in complicated multimedia processing applications. It is shown that the variation and correlation are indeed very significant. In order to make systematic analysis feasible, we apply Stochastic Timed Marked Graph (STMG) as a formal model to capture essential timing related behaviors of parallel multimedia processing systems. Then, we show how the local timing variations and correlations interact and propagate to the global timing behavior; from this we conclude general parallelization guidelines. Furthermore, we develop an analytical performance estimation technique to derive the probability distribution of timing behavior for parallel multimedia processing systems that have correlated stochastic timing behaviors inside. The estimation technique is based on principal component analysis and approximations.
Starting Page	277
Ending Page	288
File Size	804425
Page Count	12
File Format	PDF
ISBN	0769525164
ISSN	15453421
DOI	10.1109/RTAS.2006.41
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-04-04
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Statistical analysis Multimedia systems Stochastic systems Stochastic processes Automatic voltage control Probability distribution Performance analysis Timing Guidelines Principal component analysis
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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