NDLI: Video codec framework (VCF): Novel firmware architecture for video hardware

Content Provider	IEEE Xplore Digital Library
Author	Mody, M.
Copyright Year	2014
Description	Author affiliation: Multimedia Archit. Group, Texas Instrum. Inc., Bangalore, India (Mody, M.)
Abstract	The ever growing need for higher computation power for video coding (e.g. MPEG2, H.264, HEVC) lead to hardware solution for video codec, which are controlled by local RISC controller in a typical chip. The firmware running on local controller uses simple sequential model for video processing from hardware due to lack of availability of real-time OS (RTOS) as well as tight on-chip memory budgets. This works well for simple video playback scenario. In case of video surveillance and infrastructure, which requires large number of video channels of lower resolutions or video conferencing market with higher number of slice processing results in much lower utilization of video hardware as inefficiencies becomes significant resulting in lower performance. The paper proposes novel approach by defining software based video codec framework (aka VCF) to enable multi-threading in local RISC controller in firmware. The proposed framework (aka VCF) defines model for controller firmware (in terms of software acceleration, static model for data flow, state diagram etc). The proposed VCF also defines simple primitive (e.g. threads, queues, semaphores, messaging, scheduling scheme etc) to enable it without using any RTOS. The proposed video codec framework (VCF) is independent of video standard. The C simulation of proposed framework shows large improvement (by reducing overheads by more than 80%) in overall performance at system level in complex use-case of multichannel, high frame-rate and high slice rate.
Starting Page	1
Ending Page	5
File Size	648755
Page Count	5
File Format	PDF
ISBN	9781479923618
DOI	10.1109/NCC.2014.6811242
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-02-28
Publisher Place	India
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Codecs Instruction sets Architecture Utilization Video codec framework Computer architecture Video compression Hardware Firmware Kernel Multi-threading Message systems Microprogramming
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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