NDLI: An ASIC implementation of puncture and spatial stream parser for MIMO Wireless LAN system

Content Provider	IEEE Xplore Digital Library
Author	Ardiansyah, A.W. Nagao, Y. Kurosaki, M. Ochi, H.
Copyright Year	2011
Description	Author affiliation: Department of Computer Science and Electronics, Kyushu Institute of Technology, Iizuka, Japan (Ardiansyah, A.W.; Nagao, Y.; Kurosaki, M.; Ochi, H.)
Abstract	This paper discus an ASIC implementation of puncture and SSP for MIMO IEEE 802.11n 4×4 MIMO Wireless LAN system. We also describe its receiver counterpart block, which is SSDP and Depuncture. The biggest challenge of this work is 72 modes operation that need to be supported. The design is implemented on 90nm ASIC CMOS technology. Synthesis result for puncture and SSP reveal that the logic area is 0.025 $mm^{2}.$ The correspond gates count is 4.535 KGE. Circuit power consumption is 0.736 mW. The design can work at very high frequency up to 1000MHz (1GHz). Thus, it could be implemented for very high data rate applications that use MIMO OFDM techniques up to 3,750 Mbps, such as digital cinema and HDTV over wireless transmission. Meanwhile, SSDP and Depuncture synthesis shows that the logic area is 0.0309 $mm^{2}$ which is equivalent with 5.581 gates. The maximum operating frequency is lower than its transmitter counterparts, only 250 MHz. Circuit power consumption is 0.209 mW.
Starting Page	87
Ending Page	91
File Size	566598
Page Count	5
File Format	PDF
ISBN	9781457711671
e-ISBN	9781457711664
DOI	10.1109/ICICI-BME.2011.6108600
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-11-08
Publisher Place	Indonesia
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Wireless LAN SSP Transmitters OFDM Radiation detectors FEC MIMO Generators SSDP Interleaver Puncture IEEE 802.11n Standard
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
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9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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