NDLI: Hardware implementation of the IDEA NXT crypto-algorithm

Content Provider	IEEE Xplore Digital Library
Author	Bozesan, A. Opritoiu, F. Vladutiu, M.
Copyright Year	2013
Description	Author affiliation: Comput. Sci. & Eng. Dept., “Politeh.” Univ. of Timisoara, Timisoara, Romania (Bozesan, A.; Opritoiu, F.; Vladutiu, M.)
Abstract	This paper introduces a novel hardware implementation of the IDEA NXT encryption algorithm resistant to attacks, and proposes a strategy for testing the implementation on an Altera DE2 FPGA. The proposed design is analysed with respect to execution time and throughput, revealing its effectiveness in comparison to conventional approaches. Also, its performance in terms of execution time and throughput is presented by comparison to the DES, IDEA and AES cryptographic algorithms, which have been extensively used in the past few decades, and also to other implementations of the NXT algorithm previously developed. The IDEA NXT crypto-algorithm surfaced only a few years ago and little work was done so far to prove its theoretical strengths or to bring improvements, and that is what this study tries to cover.
Starting Page	35
Ending Page	38
File Size	239952
Page Count	4
File Format	PDF
ISBN	9781479915552
DOI	10.1109/SIITME.2013.6743640
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-10-24
Publisher Place	Romania
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Algorithm design and analysis Ciphers FPGA Crypto-algorithm Hardware Vectors Encryption Cryptography IDEA NXT
Content Type	Text
Resource Type	Article

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