NDLI: Forbidden switching patterns to mitigate crosstalk on parallel data buses

Content Provider	IEEE Xplore Digital Library
Author	Daraban, M. Pitica, D.
Copyright Year	2012
Description	Author affiliation: Applied Electronics Department, Technical University of Cluj-Napoca, Cluj-Napoca, Romania (Daraban, M.; Pitica, D.)
Abstract	Instead of applying physical techniques to prevent crosstalk on off-chip parallel data buses, another approach is to code the sent information, [1]. Through developing of a crosstalk avoidance code (CAC) is possible to create a forbidden transition channel (FTC) that prevents transitions responsible for generating crosstalk, [2]. Rules used in developing a CAC can be very complex, and because of that in some papers is explained only the coding algorithm without given a description of the coder/decoder (CODEC). Some of the CAC presented in literature can have only a theoretical point of view, the physical implementation raising problems regarding the real time execution requirements of such a system [3]. In section IV of the paper is explained how the proposed CAC in [4] can be extended to code a larger bus structure and implement the CODEC. In order to compare the proposed CAC performances, were implemented other two algorithms that try to mitigate crosstalk effects ([1] and [2]). In the paper are presented not only SPICE results, but also measured results obtained on a physical off-chip parallel data bus test setup.
Starting Page	31
Ending Page	36
File Size	860890
Page Count	6
File Format	PDF
ISBN	9781467347570
e-ISBN	9781467347600
DOI	10.1109/SIITME.2012.6384341
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2012-10-25
Publisher Place	Romania
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Crosstalk Switches Bismuth Formatting Style Encoding Insert Component Styling Delay Clocks Electronics packaging
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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