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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Chih-Chun Wang |
| Copyright Year | 2006 |
| Description | Author affiliation: Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN (Chih-Chun Wang) |
| Abstract | Code annealing, a new method of designing good codes of short block length, is proposed, which is then concatenated with cyclic lifting to create finite codes of low frame error rate (FER) error floors without performance outliers. The stopping set analysis is performed on the cyclically lifted code ensemble assuming uniformly random lifting sequences, and the suppressing effect/weight of the cyclic lifting is identified for the first time, based on which the ensemble FER error floor can be analytically determined and a scaling law is derived. BoUe the first-order and high-order suppressing effects are discussed and quantified by different methods including the explicit expression, an algorithmic upper bound, and an algebraic lower bound. The mismatch between the suppressing weight and the stopping distances explains the dramatic performance discrepancy among different cyclically lifted codes when the underlying base codes have degree 2 variable nodes or not. For the former case, a degree augmentation method is further introduced to mitigate this metric mismatch, and a systematic method of constructing irregular codes of low FER error floors is presented. Both regular and irregular codes of very low FER error floors are reported, for which the improvement factor ranges from $10^{6}$ - 104 when compared to the classic graph-based code ensembles |
| Starting Page | 86 |
| Ending Page | 90 |
| File Size | 6907500 |
| Page Count | 5 |
| File Format | |
| ISBN | 1424400678 |
| DOI | 10.1109/ITW2.2006.323762 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2006-10-22 |
| Publisher Place | Uruguay |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Algorithm design and analysis Design engineering Annealing Upper bound Error analysis Conferences Parity check codes Performance analysis Design optimization Information theory |
| Content Type | Text |
| Resource Type | Article |
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