Please wait, while we are loading the content...
Please wait, while we are loading the content...
| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Ghoreishi, S.S. Pourmina, M.A. Bozorgi, H. Dousti, M. |
| Copyright Year | 2009 |
| Abstract | Rivest, Shamir and Adleman (RSA) encryption algorithm is one of the most widely used and popular public- key cryptosystem. The main step in this algorithm is modular exponentiation which can be done by a sequence of modular multiplication. Thus, modular multiplication is the major factor, in many cryptosystems, e.g. the RSA Two-Key system and in the proposed digital signature standard DSS. One of the most efficient algorithms of modular multiplication is the Montgomery multiplication. In this paper, modified radix-4 modular multiplication was developed based on Booth’s multiplication technique. We use CSA (Carry Save Adder) to avoid carry propagation. Also a very fast algorithm was presented and used for computing the modular reduction. We proposed new hardware architecture for optimum implementation of this algorithm. According to our design, for encrypting an n-bit plaintext, we need to about 3/4n (n + 11) clock cycles. We used Xilinx VirtexII and XC4000 series FPGAs (Field Programmable Gate Array). As a result, it is shown that the processor can perform 1024-bit RSA operation in less than 15ms and 50ms at 54.6MHz and 16.1MHz on Xilinx VirtexII and XC4000 series FPGA, respectively. Finally we compared our results with the previous works. We can say that a significant improvement was achieved in terms of time and in terms of used time-area (TA) our work is good. |
| Starting Page | 86 |
| Ending Page | 93 |
| File Size | 655033 |
| Page Count | 8 |
| File Format | |
| ISBN | 9780769538327 |
| DOI | 10.1109/CENICS.2009.25 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2009-10-11 |
| Publisher Place | Malta |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Data security Circuits FPGA CSA Web and internet services Booth's Algorithm Public key Programmable logic arrays Montgomery exponentiation Cathode ray tubes Public key cryptography Montgomery multiplication Hardware RSA Encryption Field programmable gate arrays Clocks |
| Content Type | Text |
| Resource Type | Article |
National Digital Library of India (NDLI) is a virtual repository of learning resources which is not just a repository with search/browse facilities but provides a host of services for the learner community. It is sponsored and mentored by Ministry of Education, Government of India, through its National Mission on Education through Information and Communication Technology (NMEICT). Filtered and federated searching is employed to facilitate focused searching so that learners can find the right resource with least effort and in minimum time. NDLI provides user group-specific services such as Examination Preparatory for School and College students and job aspirants. Services for Researchers and general learners are also provided. NDLI is designed to hold content of any language and provides interface support for 10 most widely used Indian languages. It is built to provide support for all academic levels including researchers and life-long learners, all disciplines, all popular forms of access devices and differently-abled learners. It is designed to enable people to learn and prepare from best practices from all over the world and to facilitate researchers to perform inter-linked exploration from multiple sources. It is developed, operated and maintained from Indian Institute of Technology Kharagpur.
Learn more about this project from here.
NDLI is a conglomeration of freely available or institutionally contributed or donated or publisher managed contents. Almost all these contents are hosted and accessed from respective sources. The responsibility for authenticity, relevance, completeness, accuracy, reliability and suitability of these contents rests with the respective organization and NDLI has no responsibility or liability for these. Every effort is made to keep the NDLI portal up and running smoothly unless there are some unavoidable technical issues.
Ministry of Education, through its National Mission on Education through Information and Communication Technology (NMEICT), has sponsored and funded the National Digital Library of India (NDLI) project.
| Sl. | Authority | Responsibilities | Communication Details |
|---|---|---|---|
| 1 | Ministry of Education (GoI), Department of Higher Education |
Sanctioning Authority | https://www.education.gov.in/ict-initiatives |
| 2 | Indian Institute of Technology Kharagpur | Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project | https://www.iitkgp.ac.in |
| 3 | National Digital Library of India Office, Indian Institute of Technology Kharagpur | The administrative and infrastructural headquarters of the project | Dr. B. Sutradhar bsutra@ndl.gov.in |
| 4 | Project PI / Joint PI | Principal Investigator and Joint Principal Investigators of the project |
Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon |
| 5 | Website/Portal (Helpdesk) | Queries regarding NDLI and its services | support@ndl.gov.in |
| 6 | Contents and Copyright Issues | Queries related to content curation and copyright issues | content@ndl.gov.in |
| 7 | National Digital Library of India Club (NDLI Club) | Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach | clubsupport@ndl.gov.in |
| 8 | Digital Preservation Centre (DPC) | Assistance with digitizing and archiving copyright-free printed books | dpc@ndl.gov.in |
| 9 | IDR Setup or Support | Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops | idr@ndl.gov.in |
|
Loading...
|