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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Moghaddam, S.A. Mohammadi, S. Maralani, P.J. |
| Copyright Year | 2009 |
| Description | Author affiliation: School of Electrical and Computer Engineering, University of Tehran, Tehran, Iran (Moghaddam, S.A.; Mohammadi, S.; Maralani, P.J.) |
| Abstract | Asynchronous protocols exhibit various noise robustness and when used in GALS NoC links, they can directly affect the signal integrity. In this paper we study the noise robustness of two well-known asynchronous protocols, namely Dual-Rail (DRP) and Bundled-Data (BDP) in the GALS NoC links, and subsequently confirm our claims through simulations. We apply an enhanced version of BDP and DRP to 32/64 parallel line links, show results in terms of noise robustness using global interconnect features, specified in the ITRS roadmap for 32nm technology. The simulation results for two thousand random generated inputs show that the number and the amplitude of noise glitches over ‘0’ state lines as well as the required threshold voltage needed for avoiding errors in BDP link are much lower than in DRP's. Therefore, BDP links can present better signal integrity features and have less overhead compared to DRP's, employing only some simple noise reduction techniques and more timing adjustment effort. |
| Starting Page | 236 |
| Ending Page | 241 |
| File Size | 447514 |
| Page Count | 6 |
| File Format | |
| ISBN | 9781424442614 |
| DOI | 10.1109/CSICC.2009.5349421 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2009-10-20 |
| Publisher Place | Iran |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Rails Protocols Network-on-a-chip Noise reduction Threshold voltage Noise robustness Noise generators Timing Random number generation Noise level |
| Content Type | Text |
| Resource Type | Article |
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