NDLI: Partial discharge detection system for counting PD signals in high voltage underground cable by using FPGA technology

Content Provider	IEEE Xplore Digital Library
Author	Emilliano Chakrabarty, C.K. Ramasamy, A.K. Ghani, A.B.A.
Copyright Year	2010
Description	Author affiliation: TNB Research Sdn. Bhd., High Voltage Testing Laboratory Km.7, Jln. Kajang-Puchong, 43009, Selangor Darul Ehsan, Malaysia (Ghani, A.B.A.) \|\| Department of Electronics and Communications Engineering, College of Engineering, Universiti Tenaga Nasional Km.7, Jln. Kajang-Puchong, 43009, Selangor Darul Ehsan, Malaysia (Emilliano; Chakrabarty, C.K.; Ramasamy, A.K.)
Abstract	Currently, FPGA (Field Programmable Gate Array) technology is being widely used for signal processing and control owing to its fast digital processing capability. We have recently developed successfully a high-speed data acquisition system that combines a commercial FPGA board (ML405) with the high speed ADC in ADC 083000RB that has 8 bit pairs LVDS in resolution, sampling rate of 3 GS/s and bandwidth of 3 GHz for counting very high speed transient signals. The programming is in VHDL. This system enables direct measurement and counting of transient signals at 1–10 ns pulse width at a sampling frequency 3 GHz. The partial discharge (PD) signals in this work are simulated by using Pico Pulse generator. All the counting is performed in the FPGA without the use of oscilloscope. The count rates are displayed in the LCD monitor of the FPGA hence rendering it to be highly mobile.
Starting Page	1
Ending Page	6
File Size	704826
Page Count	6
File Format	PDF
e-ISBN	9788392131588
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-09-20
Publisher Place	Poland
Access Restriction	Subscribed
Rights Holder	Institute of Electrical Power
Subject Keyword	Partial discharges Real time systems Real Time Processing Underground Cable Latches Peak Detector Portable Detector Radiation detectors FPGA Technology Programming Magnitude Field Partial Discharge Detection Detectors VHDL Programming Field programmable gate arrays ADC 083000RB 3GSPS
Content Type	Text
Resource Type	Article

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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