NDLI: Practical measurements of data path delays for IP authentication & integrity verification

Content Provider	IEEE Xplore Digital Library
Author	Exurville, I. Fournier, J. Dutertre, J.-M. Robisson, B. Tria, A.
Copyright Year	2013
Description	Author affiliation: CEA, Gardanne, France (Exurville, I.; Fournier, J.; Robisson, B.; Tria, A.) \|\| EMSE, Gardanne, France (Dutertre, J.-M.)
Abstract	This paper describes the results of the practical measurements done to determine the path delay associated with each bit of a hardware AES FPGA implementation using a clock glitch injection tool. We illustrate how the measured path delays can constitute a characteristic fingerprint of an Intellectuel Property (IP) and can be used to detect the insertion of hardware trojans. The influence of synthesis options and inter die variations on the measurements is also studied. Compared to trojan detection schemes based on path delay characterisations already proposed in the literature, our approach does not require any additional test circuit to be inserted in the IP. Moreover our results are based on practical measurements.
Sponsorship	IEEE Circuits Syst. Soc.
Starting Page	1
Ending Page	6
File Size	1104579
Page Count	6
File Format	PDF
ISBN	9781467361804
DOI	10.1109/ReCoSoC.2013.6581551
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-07-10
Publisher Place	Germany
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Integrated circuits Hardware Delays Registers Trojan horses IP networks Clocks
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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