NDLI: High throughput MIMO-OFDM detection with graphics processing units

Content Provider	IEEE Xplore Digital Library
Author	Dan Sui Yunzhou Li Jing Wang Peng Wang Bin Zhou
Copyright Year	2012
Description	Author affiliation: Wireless and Mobile Communications R&D center, Tsinghua University, Beijing, China (Dan Sui; Yunzhou Li; Jing Wang) \|\| HPC Developer Technology group, NVIDIA, Beijing, China (Peng Wang; Bin Zhou)
Abstract	Graphics Processing Units (GPUs) have been one of the most important General Purpose Processors (GPPs) for Software Defined Radio (SDR), since they are specialized for vector-based data-intensive highly parallel computation. Among the main modules of SDR platform, multiple-input multiple-output (MIMO) detection is most time-consuming and computational complexity. A novel strategy is proposed to implement the minimum mean square error (MMSE)-based detector for multiple-input multiple-output (MIMO) wireless communication systems with orthogonal frequency-division multiplexing (OFDM). The key component of the strategy is a massively parallel implementation of the scalable matrix inversion, which is the performance bottleneck in the MMSE detector, on graphics processing units (GPUs). A series of optimization methods such as multi-threaded matrix inversion with multiple data frames, maximizing the utilization of the fast on-chip memories, and overlap kernel execution with data transfer between CPU and GPU, are proposed to construct a reconfigurable and flexible MMSE detector. Experimental results demonstrate that the throughput for 4×4 MIMO-OFDM system can achieve over $18×10^{6}$ symbol/s, which is equivalent to 100 Mb/s for 64QAM and can satisfy the requirement of the 4th generation wireless communication standards like LTE/LTE-Advanced.
Starting Page	176
Ending Page	179
File Size	154299
Page Count	4
File Format	PDF
ISBN	9781467300889
e-ISBN	9781467300896
DOI	10.1109/CSAE.2012.6272753
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2012-05-25
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Wireless communication Instruction sets Matrix inversion MMSE Detectors MIMO-OFDM Throughput MIMO Kernel GPU Graphics processing unit
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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