NDLI: Efficient approach to design low power reversible logic blocks for Field Programmable Gate Arrays

Content Provider	IEEE Xplore Digital Library
Author	Sayem, A.S.M. Mitra, S.K.
Copyright Year	2011
Description	Author affiliation: Department of Computer Science and Engineering, University of Dhaka, 1000, Bangladesh (Mitra, S.K.) \|\| Department of Computer Science, University of Western Ontario, London, Canada (Sayem, A.S.M.)
Abstract	Field-Programmable Gate Arrays (FPGAs) are considered as the assertive digital implementation medium as measured by design starts. The ability for designers to avoid the pitfalls of Nanoelectronic design and changing the design until last minute made FPGAs more demanding in recent years. But consumption of much area and power has been contemplated as the major drawback for FPGAs over Application Specific ICs (ASIC). In this paper, we have designed the logic block of a Plessey FPGA in reversible manner with reduced number of reversible gates, garbage outputs and quantum cost. As reversible computing reduces the power consumption of any system, this design approach will definitely resolve the power problem for FPGAs. Our proposed design uses the most cost effective reversible circuits including proposed 3*3 MG (MUX Gate) in comparison with the existing ones in literatures.
Starting Page	251
Ending Page	255
File Size	150632
Page Count	5
File Format	PDF
ISBN	9781424487271
e-ISBN	9781424487288
DOI	10.1109/CSAE.2011.5952845
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-06-10
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Multiplexing MUX Gate Reversible Logic Fredkin Gate Wires Random access memory Plessey FPGA Logic gates Decoding Field programmable gate arrays Delay
Content Type	Text
Resource Type	Article

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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