NDLI: Design of performance-adaptive PID controllers

Content Provider	IEEE Xplore Digital Library
Author	Ohnishi, Y. Yamamoto, T. Shah, S.L.
Copyright Year	2011
Description	Author affiliation: Department of Technology Education, Faculty of Education, Ehime University, Matsuyama, 790-8577 Japan (Ohnishi, Y.) \|\| Department of Chemical and Materials Engineering, University of Alberta, Edmonton, Canada, T6G 2G6 (Shah, S.L.) \|\| Division of Electrical, Systems and Mathematical Engineering, Faculty of Engineering, Hiroshima University, Higashi, 739-8527 Japan (Yamamoto, T.)
Abstract	In the challenge to manufacture high quality products for less, it is necessary to regularly monitor performance of control loops that regulate the quality variables of interest. This paper describes performance-adaptive PID control schemes which is based on a unified approach to the design of a control performance and PID controller. According to the proposed approach, the control performance is first monitored regularly. Then, if the performance exceeds a user-defined threshold, the system identification is initiated and PID parameters are subsequently updated for the new model. In this paper, two performance-adaptive PID controller design schemes are introduced. One is that the control performance is evaluated based on the minimum variance index of the control error, and PID parameters are retuned based on the relationship of the generalized predictive control. Another is that the modeling performance is first evaluated, and PID parameters are subsequently calculated based on the LQG trade-off curve obtained for the re-identified process model. The behavior of the performance-adaptive PID control schemes is numerically and experimentally evaluated.
Starting Page	331
Ending Page	336
File Size	373942
Page Count	6
File Format	PDF
ISBN	9781424474608
e-ISBN	9789881725509
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-05-23
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Zhejiang University
Subject Keyword	Process control Performance analysis Numerical models Steady-state Trajectory Monitoring Tuning
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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