NDLI: Low Active Power High Speed Cache Design

Content Provider	IEEE Xplore Digital Library
Author	Islam, A. Kafeel, M.A. Imran, A. Hasan, M.
Copyright Year	2011
Abstract	The active power is one of the major contributors to the total power consumption in the SRAM cell. It consists mainly of two components -- write power and read power. These power dissipations occur due to charging/discharging of large bit line capacitance. On-chip cache size has become increasingly important for high performance applications, and it now presents more of a limit to microprocessor speed than clock rate. The models and methodologies for the design of SRAM, an integral component of microprocessor cache, have changed with time. Presently, continued scaling is threatened by variability in SRAM performance and function. This work addresses the emerging threat of variability keeping active power consumption and speed of operation in consideration.
Starting Page	254
Ending Page	259
File Size	213052
Page Count	6
File Format	PDF
ISBN	9781457718809
DOI	10.1109/ISED.2011.46
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-12-19
Publisher Place	India
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Read static noise margin (RSNM) Carbon nanotube field effect transistor (CNFET) Noise Random access memory Variability Delay Chirality vector Microprocessors Active power Computer architecture Writing CNTFETs Static random access memory (SRAM)
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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