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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Li Xi Chen Hou-Peng Song Zhi-Tang |
| Copyright Year | 2011 |
| Description | Author affiliation: State Key Laboratory of Functional Materials for Informatics, Laboratory of Nanotechnology, Shanghai Institute of Micro-system and Information Technology, Chinese Academy of Sciences, China (Li Xi; Chen Hou-Peng; Song Zhi-Tang) |
| Abstract | This paper presents a high-performance sense amplifier and its operation method for phase change memory (PCM). The proposed structure includes pre-charge circuit, judgment circuit, bias circuit and discharge circuit. Correspondingly, the read process includes four steps of pre-charging, relaxing, sensing and discharging. Simulation results show that the proposed sense amplifier can read out the cell status efficiently in 180ns both at low resistance (10K ohm) and high resistance (100K ohm) with the parasitic capacitance of 20pF. It will be used in 40nm 1Gbit phase change memory chip. |
| Starting Page | 318 |
| Ending Page | 321 |
| File Size | 135614 |
| Page Count | 4 |
| File Format | |
| ISBN | 9781612848396 |
| e-ISBN | 9781612848402 |
| DOI | 10.1109/ICCRD.2011.5764204 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2011-03-11 |
| Publisher Place | China |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Resistance Simulation Discharges Phase change random access memory IC Phase change memory MOSFETs Sense amplifier Parasitic capacitance |
| Content Type | Text |
| Resource Type | Article |
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