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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Zhongming Shi Hsu, K. Salminen, O. Wang, P. Vahe, J. Kaltiokallio, K. |
| Copyright Year | 1997 |
| Description | Author affiliation: R&D Centre, Nokia Mobile Phones, San Diego, CA, USA (Zhongming Shi) |
| Abstract | This work presents the design and measurement results of a novel second-order demodulator for high-resolution sigma-delta digital to analog converters. The demodulator combines digital to analog converting and second-order lowpass filtering into a single step, therefore, eliminating conventionally required post analog filter. This approach offers a large reduction both in chip size and power consumption. A 14-bit fully differential second-order demodulator has been designed and implemented in a complete 2.4 V cellular baseband chip by using a double-poly and triple-metal 0.5 /spl mu/m low-power CMOS process. The total active chip area and power consumption of the demodulator are 0.18 mm/sup 2/ and 700 /spl mu/W, respectively. |
| Starting Page | 297 |
| Ending Page | 300 |
| File Size | 357515 |
| Page Count | 4 |
| File Format | |
| ISBN | 0780336690 |
| DOI | 10.1109/CICC.1997.606633 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 1997-05-05 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Demodulation Switches Clocks Filters Capacitors Power generation Energy consumption Performance gain Digital-analog conversion Digital modulation |
| Content Type | Text |
| Resource Type | Article |
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