NDLI: Matrix multiplication on a toroidal parallel architecture

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Proceedings of ICCI'93: 5th International Conference on Computing and Information

Proceedings ICCI `92: Fourth International Conference on Computing and Information

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Proceedings. ICCI '92. Fourth International Conference on Computing and Information (Cat. No.92TH0448-1)

Matrix multiplication on a toroidal parallel architecture

Content Provider	IEEE Xplore Digital Library
Author	Patterson, W.
Copyright Year	1992
Description	Author affiliation: Dept. of Comput. Sci., New Orleans Univ., LA, USA (Patterson, W.)
Abstract	Matrix multiplication is one of the class of algorithms which have considerable application and which may provide substantial increase in efficiency when implemented on an appropriate parallel machine. In particular, the author presents an algorithm for dense matrix multiplication on a toroidal architecture with n/sup 2/ processors, which has a runtime of h+nm+(n-1)a, where the matrices to be multiplied are square of order n; and where h=the time to transmit one word between adjacent processors; m=the time to multiply two words in a processor; a=the time to add two words in a processor; with a local storage requirement of 2n+2 words. Furthermore, the coefficients of the product are stored in the local memory of the same processors as the corresponding coefficients of the factors.<>
Starting Page	187
Ending Page	190
File Size	275438
Page Count	4
File Format	PDF
ISBN	081862812X
DOI	10.1109/ICCI.1992.227676
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1992-05-28
Publisher Place	Canada
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Parallel architectures Costs Runtime Parallel algorithms Memory architecture Topology Computer science Application software Parallel machines Hypercubes
Content Type	Text
Resource Type	Article

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