NDLI: Implementation of analog neural networks

Content Provider	IEEE Xplore Digital Library
Author	Hasler, P. Akers, L.
Copyright Year	1991
Description	Author affiliation: Center for Solid State Electron. Res., Arizona State Univ., Tempe, AZ, USA (Hasler, P.; Akers, L.)
Abstract	The topics discussed are: architectures of analog neural networks; multilevel or analog DRAM synapses; and a continuous time neural network using a high performance multilevel DRAM system. Neural networks must be implemented in hardware to achieve real time performance. The size and performance of the synapse element play a critical role in the overall system performance. In addition, a long term analog memory circuit is critical for most analog neural network implementations. Dynamic refreshing schemes potentially allow very compact synapses with fast read and write operations, but are only achievable with state of the art analog VLSI design theories and techniques. The implementation described performs an 8 to 10 bit transmission of a dynamically stored value and a 2 MHz, successive approximation analog-to-digital (A/D) to digital-to-analog (D/A) converter.<>
Starting Page	32
Ending Page	38
File Size	538528
Page Count	7
File Format	PDF
ISBN	0818621338
DOI	10.1109/PCCC.1991.113788
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1991-03-27
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Neural networks Neurons Biological neural networks Neural network hardware Computer architecture Integrated circuit interconnections Real time systems Computer simulation Neurofeedback Analog computers
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in