NDLI: System-level optimization of architectural performance under varying service demands

Content Provider	IEEE Xplore Digital Library
Author	Mulcare, D.B.
Copyright Year	1996
Description	Author affiliation: SAIC, Warner Robins, GA, USA (Mulcare, D.B.)
Abstract	This paper describes the motivation, methods, and application of a regimen for optimizing cost-performance measures for distributed system architectures. Dynamic performance under varying workloads was optimized in terms of system resource parameters in an absolute time base context. The intent was to establish an exacting yet practical means for setting architecture parameters and tolerances near the outset of system-level development. An existing software-implemented prototype for an on-line transaction processing system (OLTPS) was modified and interfaced with a genetic algorithm (GA). An objective function composed of architecture attributes was used as a fitness metric for the GA. Five architecture parameters encoded in a 24-bit chromosome were manipulated by the GA to furnish instantiation values for the OLTPS prototype. After each prototype execution, four dynamic performance measures were fed to the GA for fitness ranking. Despite some hesitancy in GA convergence, the overall optimization scheme worked well. To achieve more rapid resolution of optima, a multiple mutation operator mechanism was improvised and used to advantage. In all, the effort expended for dynamically quantified system-level optimization is seen as well justified and quite beneficial to overall system design.
Starting Page	235
Ending Page	242
File Size	883394
Page Count	8
File Format	PDF
ISBN	0818673559
DOI	10.1109/ECBS.1996.494534
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1996-03-11
Publisher Place	Germany
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Optimization methods Prototypes System-level design Software prototyping Biological cells Convergence Genetic mutations Design optimization Embedded system Concurrent computing
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
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3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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