NDLI: A multichannel synthesizer and voltmeter for electrical impedance tomography

Content Provider	IEEE Xplore Digital Library
Author	Liu, N. Saulnier, G.J. Newell, J.C.
Copyright Year	2003
Description	Author affiliation: Dept. of Electr. Comput. & Syst. Eng., Rensselaer Polytech. Inst., Troy, NY, USA (Liu, N.; Saulnier, G.J.)
Abstract	This paper describes the signal generator and voltmeter design for a high-speed, high-precision electrical impedance tomography (EIT) and its implementation in a field programmable gate array (FPGA). Since the EIT inverse problem is highly ill-posed it requires that the applied and measured signals have very high precision. In our application we need 16 bits of control for the sources and 16 to 19 bits of precision for the voltmeters. The signal generator design reported here includes a direct digital synthesizer (DDS) and a complex modulator to generate a sinusoidal waveform with controllable amplitude, frequency and phase. The modulated output is then sent to a D/A converter (DAC) to produce an analog signal. The voltmetering is performed using a complex matched filter that produces estimates of both the real and quadrature parts of the voltage. Many samples are used to produce a single voltage measurement, producing measurement precision greater than that of the A/D converter (ADC). The digital sinusoid signal is used as a coherent reference by the matched filter. The implementation of 8 signal generators and voltmeters in a single Xilinx Virtex-II field programmable gate array (FPGA) is presented.
Sponsorship	Whitaker Found
Starting Page	3110
Ending Page	3113
File Size	261539
Page Count	4
File Format	PDF
ISBN	0780377893
ISSN	1094687X
DOI	10.1109/IEMBS.2003.1280800
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2003-09-17
Publisher Place	Mexico
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Synthesizers Voltmeters Impedance Tomography Signal generators Field programmable gate arrays Signal design Matched filters Voltage measurement Inverse problems
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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