NDLI: Build Up Material Effect on High Performance Flip Chip Ball Grid Array Package Reliability

Content Provider	IEEE Xplore Digital Library
Author	Leilei Zhang Lan Hoang
Copyright Year	2006
Description	Author affiliation: Xilinx, San Jose, CA (Leilei Zhang; Lan Hoang)
Abstract	In this paper, three different kinds of build up materials for high performance flip chip ball grid array packages were studied to understand material property of substrate build up layer effects on package reliability. Finite element analysis was first used to analysis the stress and thermal fatigue life of the package with different build up materials. Temperature cycle tests on both component level and board level were then performed to see differences in three different build up materials. Both simulation and experimental results reveal that reducing build up material CTE can improve package both component level and board level reliability. Build up material A has both better component level and board level reliability than build up material B and C. The experimental results also confirm that simulation can be used for new material development and evaluation
Starting Page	1
Ending Page	6
File Size	6097723
Page Count	6
File Format	PDF
ISBN	1424406196
DOI	10.1109/ICEPT.2006.359846
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-08-26
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Flip chip Electronics packaging Materials reliability Thermal stresses Material properties Finite element methods Fatigue Temperature Materials testing Performance evaluation
Content Type	Text
Resource Type	Article

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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