NDLI: A high-voltage, medium-power silicon planar epitaxial switching transistor

Content Provider	IEEE Xplore Digital Library
Author	Castrucci, P.P. Martin, J.P. Folsom, R.M.
Copyright Year	1963
Description	Author affiliation: IBM Corporation, Poughkeepsie, New York (Castrucci, P.P.)
Abstract	Since transistors have been used as drivers in ferrite core solid-state memories, the push for increased performance has been relentless. To compound the problem, the increased performance has always been required in all directions simultaneously, such as higher operating voltage, higher current capability, higher speed, and lower saturation drops. Along with the foregoing requirements, high reliability is also mandatory. This paper describes the development of a transistor with improved performance in all of the categories mentioned above. It is a double-diffused, epitaxial, silicon NPN planar structure employing a unique impurity gradient in the epitaxial layer and a unique ohmic contact geometry. The result is a transistor with a BVCBO> 180 v., a BVCEO> 90 v., that will switch 600 ma. through a 90 volt collector voltage swing in 35 nsec., 10 to 90%, with a 60 ma. base drive. With increased base drive, 100 ma., the switching time can be reduced to < 25 nsec. VBE(SAT)is less than 1.5 v. and VCE(SAT)is less than 1.0 v.
Starting Page	100
Ending Page	100
File Size	78337
Page Count	1
File Format	PDF
DOI	10.1109/IEDM.1963.187418
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1963-10-31
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Silicon Voltage Switches Driver circuits Ferrites Solid state circuits Impurities Epitaxial layers Ohmic contacts Geometry
Content Type	Text
Resource Type	Article

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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