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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Jong Pyo Kim Yun-Seok Kim Ha Jin Lim Jung Hyoung Lee Seok Joo Doh Hyung-Suk Jung Sung-Kee Han Min-Joo Kim Jong-Ho Lee Nae-In Lee Ho-Kyu Kang Kwang-Pyuk Suh Young-Su Chung |
| Copyright Year | 2002 |
| Description | Author affiliation: Syst. LSI Bus., Samsung Electron. Co., Ltd., Kyunggi-Do, South Korea (Jong Pyo Kim; Yun-Seok Kim; Ha Jin Lim; Jung Hyoung Lee; Seok Joo Doh; Hyung-Suk Jung; Sung-Kee Han; Min-Joo Kim; Jong-Ho Lee; Nae-In Lee; Ho-Kyu Kang; Kwang-Pyuk Suh) |
| Abstract | For the first time, we evaluate the HCI and BTI degradation of ALD HfSiO(N) gate dielectrics as the compositions and the post annealing conditions. The HCI and PBTI degradation are minimized at Hf to Si cycle ratio of 3 to 1 (Hf/(Hf+Si) = 0.75) and the post reoxidation annealing suppresses both degradations. It is believed that the HCI and PBTI degradation are related to the electron traps in the gate oxide. However, NBTI degradation is negligibly small compared to PBTI degradation. This indicates that the positive fixed charge generation or hole traps are not significant in ALD HfSiO(N) gate dielectrics. |
| Starting Page | 125 |
| Ending Page | 128 |
| File Size | 263443 |
| Page Count | 4 |
| File Format | |
| ISBN | 0780386841 |
| DOI | 10.1109/IEDM.2004.1419084 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2004-12-13 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Human computer interaction Dielectrics Degradation Annealing Hafnium Stress Electron traps MOCVD CMOS process Threshold voltage |
| Content Type | Text |
| Resource Type | Article |
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