NDLI: An efficient pre-layout on-chip inductance noise modeling tool for bus design

Content Provider	IEEE Xplore Digital Library
Author	Mazumder, M. Bohnke, R. Husain, A. Grannes, D. Chiprout, E. Lei Sun Menon, S. Eells, J. Changhong Dai
Copyright Year	2003
Description	Author affiliation: Technol. CAD, Santa Clara, CA, USA (Mazumder, M.)
Abstract	On-chip inductance noise is becoming an increasingly important part of the total noise, particularly for global on-chip interconnects, because of faster transistor speeds and higher drive currents. An efficient pre-layout tool has been developed for accurate analysis of high frequency inductance effects on bus design. Since the return loop for inductance is not known a priori, a novel technique has been developed for fast determination of the inductance extraction window size to include all significant couplings and a sufficient number of power/ground return conductors. In addition, an algorithm has been developed for worst-case vector generation to estimate worst-case peak noise. The tool includes a methodology to determine the impact of power supply noise on bus crosstalk noise. It integrates RLC extraction, netlist generation, automatic worst-case vector generation, transient simulation, optimization, and post-processing of the simulated results to calculate noise, delay, and other signal integrity metrics. We demonstrate its application on optimal bus design by a microprocessor design group.
Sponsorship	IEEE Microwave Theory and Techniques Soc. IEEE Components, Packaging and Manufacturing Technol. Soc
Starting Page	317
Ending Page	320
File Size	336233
Page Count	4
File Format	PDF
ISBN	0780381289
DOI	10.1109/EPEP.2003.1250058
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2003-10-27
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Inductance Frequency Circuit noise RLC circuits Noise generators Noise figure Design automation Circuit simulation Conductors Driver circuits
Content Type	Text
Resource Type	Article

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