NDLI: A high resolution Serializer and Deserializer architecture for mobile image sensor module

Content Provider	IEEE Xplore Digital Library
Author	Eung-ju Kim Kwan-Jae Lee Sukki Kim
Copyright Year	2010
Description	Author affiliation: Dept. of Electrical Engineering Korea University, Seoul, Republic of Korea (Eung-ju Kim; Kwan-Jae Lee; Sukki Kim)
Abstract	This paper describes a new Serializer and Deserializer (SerDes) architecture for mobile camera serial interface CMOS image sensor module. This new SerDes architecture enables the effective transmission of digital packet with a timing controller. For the effective serializing and deserializing operations, we adopted the multiplexing technique with a Double Data Rate (DDR) process. By this technique, we can reduce the clock periods by half. The proposed SerDes structure with its transceiver was fabricated using 0.18um CMOS technology. This proposed circuit was verified by using a Mega pixel Mobile Display Digital Interface (MDDI) Image Sensor Module (ISM) at 500Mbps and also tested over this data rate. And this circuit shows low power consumption of 14mW at the supply voltage of 1.8 V.
Starting Page	1
Ending Page	4
File Size	1653637
Page Count	4
File Format	PDF
ISBN	9781424453764
ISSN	08407789
DOI	10.1109/CCECE.2010.5575153
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-05-02
Publisher Place	Canada
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Clocks Mobile communication Multiplexing Power demand Receivers Synchronization image sensor Serial interface SerDes DDR MDDI
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering Hardware and Architecture

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