NDLI: Consistency requirements of distributed shared memory for Dijkstra's mutual exclusion algorithm

Content Provider	IEEE Xplore Digital Library
Author	Brzezinski, J. Wawrzyniak, D.
Copyright Year	2000
Description	Author affiliation: Inst. of Comput. Sci., Tech. Univ. Poznan, Poland (Brzezinski, J.)
Abstract	As is well known any algorithm correct in an asynchronous shared memory setting (physically shared memory) can be directly applied in distributed shared memory (DSM) systems provided that the latter guarantees strong consistency (atomic or sequential) of replicas. Generally however, in DSM systems, weaker consistency models (causal, processor, PRAM, etc.) are often considered to improve the performance. A weakening consistency model may however imply the incorrectness of the algorithm. So we face a consistency requirement problem, the problem of finding the weakest consistency model of DSM that is sufficient and necessary for algorithm correctness. We consider a reliable DSM environment, and present a complex consistency model comprising three elementary models: sequential consistency, coherence and PRAM consistency. This complex model is then applied to Dijsktra's (1965) algorithm for mutual exclusion of n processes, one of the first solutions to a fundamental problem in both centralised and distributed operating systems. In the resulting algorithm, coherence and PRAM consistency are associated with some write operations performed at shared memory locations. As concurrent execution of write operations with weaker consistency models is more efficient when compared to the execution of strongly consistent operations, the proposed solution reduces synchronisation delay (mutual exclusion overhead) and thereby increases system throughput. The presented model is proven to be sufficient for algorithm correctness. Moreover, the algorithm is shown to be optimal in the sense that further relaxation of any write operations semantics violates progress (liveness) or safety of the algorithm.
Starting Page	618
Ending Page	625
File Size	101398
Page Count	8
File Format	PDF
ISBN	0769506011
ISSN	10636927
DOI	10.1109/ICDCS.2000.840978
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2000-04-10
Publisher Place	Taiwan
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Phase change random access memory Memory management Operating systems Delay
Content Type	Text
Resource Type	Article
Subject	Computer Networks and Communications Hardware and Architecture Software

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