NDLI: Multi-dimensional locks with on-line allocation schemes

Content Provider	IEEE Xplore Digital Library
Author	Scheerer, D. Schenfeld, E. Viredaz, M.A.
Copyright Year	1996
Description	Author affiliation: NEC Res. Inst., Princeton, NJ, USA (Scheerer, D.; Schenfeld, E.; Viredaz, M.A.)
Abstract	Synchronization is inherent to parallel computing and comprises many aspects. One aspect is the access control to shared data, especially important in MIMD shared-memory architectures. Several locking mechanisms have been proposed to perform this task. Most of these schemes rely on very little hardware support, such as atomic read-modify-write operations. Today, the amount of hardware required to implement a locking mechanism is not a major constraint and will be even less important in the future. This makes it interesting to investigate schemes with more flexibility, better performance, and improved ease of use, that rely more on hardware assisted circuits than previous suggestions. In this paper multi-dimensional locking schemes that allocate locks on-line are presented. A lock is assigned to the access control of a data structure only during the time this structure needs to be locked. Three specific schemes are proposed. Two offer the possibility of locking sub-structures within multi-dimensional arrays. All three schemes protect locked structures against accesses of misbehaving threads.
Starting Page	241
Ending Page	248
File Size	776246
Page Count	8
File Format	PDF
ISBN	0818673990
DOI	10.1109/ICDCS.1996.507922
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1996-05-27
Publisher Place	Hong Kong
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Protection Hardware Yarn Access control Data structures Parallel processing Circuits National electric code Databases Laboratories
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
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8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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