NDLI: A new time-interleaved architecture for high-speed A/D converters

Content Provider	IEEE Xplore Digital Library
Author	El-Sankary, K. Assi, A. Sawan, M.
Copyright Year	2002
Description	Author affiliation: Dept. of Electr. Eng., Ecole Polytech. de Montreal, Que., Canada (El-Sankary, K.; Assi, A.; Sawan, M.)
Abstract	Time-interleaved ADCs (TIADCs) are among the fastest architectures adopted when speed is the bottleneck of the system. Real-time medical imaging and networked video are few examples of many applications using such fast ADCs. The spurious-free dynamic range (SFDR) is an important parameter of high-speed TIADCs. We propose a new time-interleaved ADC architecture that reduces the spurious components and allow us to obtain better SFDR with reasonable addition of control and delay circuits to the ADC. The proposed architecture is digitally oriented, i.e. does not need complex analog circuitries. Matlab simulations show the effectiveness of the proposed approach in a multichannel ADC with arbitrary bit resolution and sampling rate. For a 12 bit ADC, the SFDR achieved using the proposed randomizing method can be as wide as -78 dBc.
Sponsorship	Center for Adv. Comput. Studies, Univ. Louisiana at Lafayette Center for Digital & Computational Video, Univ. South Florida
Starting Page	93
Ending Page	99
File Size	444227
Page Count	7
File Format	PDF
ISBN	0780379845
DOI	10.1109/DCV.2002.1218748
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2002-11-15
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Delay Computer architecture Sampling methods Timing Biomedical imaging Silicon Clocks Analog circuits Laboratories Dynamic range
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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