NDLI: Scaling effect on specific contact resistivity in nano-scale metal-semiconductor contacts

Content Provider	IEEE Xplore Digital Library
Author	Park, S.-H. Kharche, N. Basu, D. Jiang, Z. Nayak, S.K. Weber, C.E. Hegde, G. Haume, K. Kubis, T. Povolotskyi, M. Klimeck, G.
Copyright Year	2013
Description	Author affiliation: Rensselaer Polytech. Inst., Troy, NY, USA (Nayak, S.K.) \|\| Process Technol. & Device Modeling Group, Intel Corp., Hillsboro, OR, USA (Park, S.-H.; Basu, D.; Weber, C.E.) \|\| Purdue Univ., West Lafayette, IN, USA (Jiang, Z.; Hegde, G.; Haume, K.; Kubis, T.; Povolotskyi, M.; Klimeck, G.) \|\| Brookhaven Nat. Lab., Upton, NY, USA (Kharche, N.)
Abstract	Progressive downscaling has allowed semiconductor industries to continuing improve the performance of integrated circuits (ICs) [1]. The downscaling adversely affects the performance of interconnects. Specifically, the resistivity of metal interconnects and metal-semiconductor contacts increases due to downscaling. The metal-semiconductor contact resistance is becoming a performance limiting factor as it takes larger fraction of the total on-state resistance [2]. Hence, the contact resistance must be reduced to meet ITRS performance requirements of future technology nodes. As metal-semiconductor interface shrinks simultaneously as device shrinks, it becomes questionable if the resistivity still can meet the ITRS requirements when it reaches to the certain scaling limit (sub-10nm). Specific contact resistivity $(ρ_{C})$ is one of important factors affecting total contact resistance, and it is determined by important factors such as metal-semiconductor Schottky barrier height and semiconductor doping. This work investigates the effects of contact geometry, Schottky barrier height, and doping concentration on the specific contact resistivity.
Starting Page	125
Ending Page	126
File Size	1040910
Page Count	2
File Format	PDF
ISBN	9781479908110
ISSN	15483770
e-ISBN	9781479908141
DOI	10.1109/DRC.2013.6633825
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-06-23
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Effective mass Conductivity Metals Wires Semiconductor device modeling Semiconductor process modeling Adaptation models
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
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9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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