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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Chiusano, S. Di Carlo, S. Prinetto, P. Wunderlich, H.-J. |
| Copyright Year | 2001 |
| Description | Author affiliation: Dipartimento di Autom. e Inf., Politecnico di Torino, Italy (Chiusano, S.) |
| Abstract | The Functional BIST approach is a rather new BIST technique based on exploiting embedded system functionality to generate deterministic test patterns during BIST. The approach takes advantages of two well-known testing techniques, the arithmetic BIST approach and the reseeding method. The main contribution of the present paper consists in formulating the problem of an optimal reseeding computation as an instance of the set covering problem. The proposed approach guarantees high flexibility, is applicable to different functional modules, and, in general, provides a more efficient test set encoding then previous techniques. In addition, the approach shorts the computation time and allows to better exploiting the tradeoff between area overhead and global test length as well as to deal with larger circuits. |
| Sponsorship | EDAA |
| Starting Page | 156 |
| Ending Page | 160 |
| File Size | 499295 |
| Page Count | 5 |
| File Format | |
| ISBN | 0769509932 |
| ISSN | 15301591 |
| DOI | 10.1109/DATE.2001.915017 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2001-03-13 |
| Publisher Place | Germany |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Circuit testing Built-in self-test System testing Circuit analysis computing Circuit faults Minimization World Wide Web Arithmetic Encoding Sequential analysis |
| Content Type | Text |
| Resource Type | Article |
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