NDLI: Panel: Complex System Verification: The Challenge Ahead

Content Provider	IEEE Xplore Digital Library
Author	Collett, R.
Copyright Year	1994
Description	Author affiliation: Collett International, Inc., Santa Clara, CA (Collett, R.)
Abstract	Time-to-market continues to be The Challenge faced by developers of complex electronic systems. The bottleneck - which was traditionally in the design phase of the project - has now moved downstream to the system-level verification stage. The growing adoption of top-down design methodologies based on HDL and synthesis has made the generation of large multi-million gate designs easier than before. The efficient verification of those newly created gates in the final system is now the key to solving The Challenge. Technologies such as rapid system prototyping, ASIC emulation and formal verification offer the potential to completely verify the full system. Hardware and software co-design and HDL test benches offer the potential to feed real world inputs to the verification process. This panel will assess the outlook for verification for complex systems. We will focus on enabling technologies which show promise in this area, both now and for the future. The panel will present a mixture of tutorial material, leading edge academic work, current technology and the user's perspective. In addition to current and future technologies, each speaker will specifically address how design methodology is impacted by their choice of verification methodology. The discussion of the panel will focus on: -What's required from the EDA industry to make their customers successful in the future? -System level verification can be quite expensive. Is the promised Return-On-Investment really there? -Which technologies are usable without turning design methodologies upside down? -Just what is product and what is research in this area? The target audience includes chip and system designers, design managers and executive management who are pondering the benefits and costs of implementing system-level verification. The panelists represent a mix of academia, companies offering verification solutions and users of system-level verification products. The panel will begin with a tutorial on Formal Verification. All other panelists will be limited to a short position statement, allowing ample time for discussion. Each panelist will provide their own perspective of system-level verification challenges.
Starting Page	320
Ending Page	320
File Size	9455
Page Count	1
File Format	PDF
ISBN	0897916530
ISSN	0738100X
DOI	10.1109/DAC.1994.204119
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1994-06-06
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Association for Computing Machinery, Inc. (ACM)
Subject Keyword	Design methodology Hardware design languages Formal verification Time to market Software prototyping Prototypes Application specific integrated circuits Emulation Software systems Software testing
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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