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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Leinwand, S.M. |
| Copyright Year | 1981 |
| Description | Author affiliation: University of Illinois, Chicago, IL (Leinwand, S.M.) |
| Abstract | Theoretically, simulation can be activity oriented, event oriented or process oriented. Existing techniques for logic simulation are either activity or event oriented. In this paper, the possibility of logic simulation using process oriented concepts is investigated. Such an approach is justified by the need to support modular design environments. The key feature is that of asynchronous module activity: the timing order of signal changes has to be preserved only for those events belonging to the same module. It is shown that as long as the proper order of occurence for intermodule signaling is faithfully preserved, a centralized scheduling of events is avoidable. Thus, sequences of uninterruptible local events (termed atomic activities) can be simulated in complete isolation. The correct definition of uninterruptible local activities needs some information on allowable timing of interface events. |
| Starting Page | 511 |
| Ending Page | 517 |
| File Size | 662444 |
| Page Count | 7 |
| File Format | |
| DOI | 10.1109/DAC.1981.1585404 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 1981-06-29 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Timing Discrete event simulation Switches Local activities Logic design Design automation System testing Flip-flops Digital systems Communication system control |
| Content Type | Text |
| Resource Type | Article |
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