NDLI: Reducing cache energy through dual voltage supply

Content Provider	IEEE Xplore Digital Library
Author	Moshnyaga, V.G.
Copyright Year	2001
Description	Author affiliation: Dept. of Electr. & Comput. Sci., Fukuoka Univ., Japan (Moshnyaga, V.G.)
Abstract	Due to a large capacitance and enormous access rate, caches dissipate about a third of the total energy consumed by today's processors. In this paper we present a new architectural technique to reduce energy consumption in caches. Unlike previous approaches, which have focused on lowering cache capacitance and the number of accesses, our method exploits a new freedom in cache design, namely the voltage per access. Since in modern caches, the loading capacitance operated on cache-hit is much less than the capacitance operated on cache-miss, the given clock cycle time is inefficiently exploited during the hit. We propose to trade-off this unused time with the supply voltage, lowering the voltage level on the hit and increasing it during the miss. Experiments shows that the approach can save up to 60% of cache energy without large performance and area overhead.
Sponsorship	IEEE Circuits & Syst. Soc.
Starting Page	302
Ending Page	305
File Size	475868
Page Count	4
File Format	PDF
ISBN	0780366336
DOI	10.1109/ASPDAC.2001.913323
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2001-02-02
Publisher Place	Japan
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Voltage Capacitance Clocks Phased arrays Energy consumption Energy dissipation Design optimization Banking Microprocessors Pipelines
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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